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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
759
Total Papers
568
No Code
21
Twilight
170
Has Code
22.4%
Survival Rate
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Accelerating Frontier MoE Training with 3D Integrated Optics
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FlexLink: Boosting your NVLink Bandwidth by 27% without accuracy concern
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ASIC-Agent: An Autonomous Multi-Agent System for ASIC Design with Benchmark Evaluation
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Scalable FPGA Framework for Real-Time Denoising in High-Throughput Imaging: A DRAM-Optimized Pipeline using High-Level Synthesis
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XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs
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HetGPU: The pursuit of making binary compatibility towards GPUs
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Topology-Aware Virtualization over Inter-Core Connected Neural Processing Units
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Efficient Optimization Accelerator Framework for Multistate Ising Problems
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Sandwich: Separating Prefill-Decode Compilation for Efficient CPU LLM Serving
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MVDRAM: Enabling GeMV Execution in Unmodified DRAM for Low-Bit LLM Acceleration
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Neural Signal Compression using RAMAN tinyML Accelerator for BCI Applications
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MemPool Flavors: Between Versatility and Specialization in a RISC-V Manycore Cluster
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A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications
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FPGA Innovation Research in the Netherlands: Present Landscape and Future Outlook
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Multi-Tenant SmartNICs for In-Network Preprocessing of Recommender Systems
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The Magnificent Seven Challenges and Opportunities in Domain-Specific Accelerator Design for Autonomous Systems
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FinGraV: Methodology for Fine-Grain GPU Power Visibility and Insights
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Simopt -- Simulation pass for Speculative Optimisation of FPGA-CAD flow
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Optimized thread-block arrangement in a GPU implementation of a linear solver for atmospheric chemistry mechanisms
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NetSmith: An Optimization Framework for Machine-Discovered Network Topologies
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Synergistic and Efficient Edge-Host Communication for Energy Harvesting Wireless Sensor Networks
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ASC-Hook: fast and transparent system call hook for Arm
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