A CMOS Spiking Neuron for Dense Memristor-Synapse Connectivity for Brain-Inspired Computing
June 02, 2015 ยท Declared Dead ยท ๐ IEEE International Joint Conference on Neural Network
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Authors
Xinyu Wu, Vishal Saxena, Kehan Zhu
arXiv ID
1506.01069
Category
cs.NE: Neural & Evolutionary
Cross-listed
cs.ET
Citations
35
Venue
IEEE International Joint Conference on Neural Network
Last Checked
2 months ago
Abstract
Neuromorphic systems that densely integrate CMOS spiking neurons and nano-scale memristor synapses open a new avenue of brain-inspired computing. Existing silicon neurons have molded neural biophysical dynamics but are incompatible with memristor synapses, or used extra training circuitry thus eliminating much of the density advantages gained by using memristors, or were energy inefficient. Here we describe a novel CMOS spiking leaky integrate-and-fire neuron circuit. Building on a reconfigurable architecture with a single opamp, the described neuron accommodates a large number of memristor synapses, and enables online spike timing dependent plasticity (STDP) learning with optimized power consumption. Simulation results of an 180nm CMOS design showed 97% power efficiency metric when realizing STDP learning in 10,000 memristor synapses with a nominal 1Mฮฉ memristance, and only 13ฮผA current consumption when integrating input spikes. Therefore, the described CMOS neuron contributes a generalized building block for large-scale brain-inspired neuromorphic systems.
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