Applying Multi-Core Model Checking to Hardware-Software Partitioning in Embedded Systems (extended version)

September 08, 2015 ยท The Ethereal ยท ๐Ÿ› Brazilian Symposium on Computing System Engineering

๐Ÿ”ฎ THE ETHEREAL: The Ethereal
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Authors Alessandro Trindade, Hussama Ismail, Lucas Cordeiro arXiv ID 1509.02492 Category cs.LO: Logic in CS Cross-listed cs.SE Citations 5 Venue Brazilian Symposium on Computing System Engineering Last Checked 5 months ago
Abstract
We present an alternative approach to solve the hardware (HW) and software (SW) partitioning problem, which uses Bounded Model Checking (BMC) based on Satisfiability Modulo Theories (SMT) in conjunction with a multi-core support using Open Multi-Processing. The multi-core SMT-based BMC approach allows initializing many verification instances based on processors cores numbers available to the model checker. Each instance checks for a different optimum value until the optimization problem is satisfied. The goal is to show that multi-core model-checking techniques can be effective, in particular cases, to find the optimal solution of the HW-SW partitioning problem using an SMT-based BMC approach. We compare the experimental results of our proposed approach with Integer Linear Programming and the Genetic Algorithm.
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