Routing in Networks on Chip with Multiplicative Circulant Topology
February 08, 2019 Β· Declared Dead Β· π Journal of Physics: Conference Series
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Authors
Shchegoleva M. A., Romanov A. Yu., Lezhnev E. V., Amerikanov A. A
arXiv ID
1902.03314
Category
cs.AR: Hardware Architecture
Cross-listed
cs.NI
Citations
2
Venue
Journal of Physics: Conference Series
Last Checked
3 months ago
Abstract
The development of multi-core processor systems is a demanded branch of science and technology. The appearance of processors with dozens and hundreds of cores poses to the developers the question of choosing the optimal topology capable to provide efficient routing in a network with a large number of nodes. In this paper, we consider the possibility of using multiplicative circulants as a topology for networks-on-chip. A specialized routing algorithm for networks with multiplicative circulant topology, taking into account topology features and having a high scalability, has been developed.
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