Routing in Networks on Chip with Multiplicative Circulant Topology

February 08, 2019 Β· Declared Dead Β· πŸ› Journal of Physics: Conference Series

πŸ‘» CAUSE OF DEATH: Ghosted
No code link whatsoever

"No code URL or promise found in abstract"

Evidence collected by the PWNC Scanner

Authors Shchegoleva M. A., Romanov A. Yu., Lezhnev E. V., Amerikanov A. A arXiv ID 1902.03314 Category cs.AR: Hardware Architecture Cross-listed cs.NI Citations 2 Venue Journal of Physics: Conference Series Last Checked 3 months ago
Abstract
The development of multi-core processor systems is a demanded branch of science and technology. The appearance of processors with dozens and hundreds of cores poses to the developers the question of choosing the optimal topology capable to provide efficient routing in a network with a large number of nodes. In this paper, we consider the possibility of using multiplicative circulants as a topology for networks-on-chip. A specialized routing algorithm for networks with multiplicative circulant topology, taking into account topology features and having a high scalability, has been developed.
Community shame:
Not yet rated
Community Contributions

Found the code? Know the venue? Think something is wrong? Let us know!

πŸ“œ Similar Papers

In the same crypt β€” Hardware Architecture

Died the same way β€” πŸ‘» Ghosted