Formalizing Time4sys using parametric timed automata

May 23, 2019 Β· Declared Dead Β· πŸ› Theoretical Aspects of Software Engineering

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Authors Γ‰tienne AndrΓ© arXiv ID 1905.09458 Category cs.SE: Software Engineering Cross-listed cs.FL Citations 1 Venue Theoretical Aspects of Software Engineering Last Checked 5 months ago
Abstract
Critical real-time systems must be verified to avoid the risk of dramatic consequences in case of failure. Thales developed an open formalism Time4sys to model real-time systems, with expressive features such as periodic or sporadic tasks, task dependencies, distributed systems, etc. However, Time4sys does not natively allow for a formal reasoning. In this work, we present a translation from Time4sys to (parametric) timed automata, so as to allow for a formal verification.
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