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A Custom 7nm CMOS Standard Cell Library for Implementing TNN-based Neuromorphic Processors
December 10, 2020 Β· Declared Dead Β· π arXiv.org
"No code URL or promise found in abstract"
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Authors
Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen
arXiv ID
2012.05419
Category
cs.AR: Hardware Architecture
Cross-listed
cs.ET,
cs.LG,
cs.NE
Citations
0
Venue
arXiv.org
Last Checked
3 months ago
Abstract
A set of highly-optimized custom macro extensions is developed for a 7nm CMOS cell library for implementing Temporal Neural Networks (TNNs) that can mimic brain-like sensory processing with extreme energy efficiency. A TNN prototype (13,750 neurons and 315,000 synapses) for MNIST requires only 1.56mm2 die area and consumes only 1.69mW.
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