High-Level Approaches to Hardware Security: A Tutorial

July 21, 2022 ยท The Cartographer ยท ๐Ÿ› ACM Transactions on Embedded Computing Systems

๐Ÿ“š THE CARTOGRAPHER: The Cartographer
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Authors Hammond Pearce, Ramesh Karri, Benjamin Tan arXiv ID 2207.10466 Category cs.CR: Cryptography & Security Citations 15 Venue ACM Transactions on Embedded Computing Systems Last Checked 2 days ago
Abstract
Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities have been rising. This is forcing IC designers and end users to re-evaluate their trust in ICs. If attackers get hold of an unprotected IC, they can reverse engineer the IC and pirate the IP. Similarly, if attackers get hold of a design, they can insert malicious circuits or take advantage of "backdoors" in a design. Unintended design bugs can also result in security weaknesses. This tutorial paper provides an introduction to the domain of hardware security through two pedagogical examples of hardware security problems. The first is a walk-through of the scan chain-based side channel attack. The second is a walk-through of logic locking of digital designs. The tutorial material is accompanied by open access digital resources that are linked in this article.
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