OpenSpike: An OpenRAM SNN Accelerator

February 02, 2023 · Entered Twilight · 🏛 International Symposium on Circuits and Systems

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Authors Farhad Modaresi, Matthew Guthaus, Jason K. Eshraghian arXiv ID 2302.01015 Category cs.AR: Hardware Architecture Cross-listed cs.NE Citations 11 Venue International Symposium on Circuits and Systems Repository https://github.com/sfmth/OpenSpike ⭐ 168 Last Checked 2 months ago

Abstract

This paper presents a spiking neural network (SNN) accelerator made using fully open-source EDA tools, process design kit (PDK), and memory macros synthesized using OpenRAM. The chip is taped out in the 130 nm SkyWater process and integrates over 1 million synaptic weights, and offers a reprogrammable architecture. It operates at a clock speed of 40 MHz, a supply of 1.8 V, uses a PicoRV32 core for control, and occupies an area of 33.3 mm^2. The throughput of the accelerator is 48,262 images per second with a wallclock time of 20.72 us, at 56.8 GOPS/W. The spiking neurons use hysteresis to provide an adaptive threshold (i.e., a Schmitt trigger) which can reduce state instability. This results in high performing SNNs across a range of benchmarks that remain competitive with state-of-the-art, full precision SNNs. The design is open sourced and available online: https://github.com/sfmth/OpenSpike