Leveraging Residue Number System for Designing High-Precision Analog Deep Neural Network Accelerators
June 15, 2023 Β· Declared Dead Β· π arXiv.org
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Authors
Cansu Demirkiran, Rashmi Agrawal, Vijay Janapa Reddi, Darius Bunandar, Ajay Joshi
arXiv ID
2306.09481
Category
cs.AR: Hardware Architecture
Cross-listed
cs.ET,
cs.LG,
cs.NE
Citations
0
Venue
arXiv.org
Last Checked
3 months ago
Abstract
Achieving high accuracy, while maintaining good energy efficiency, in analog DNN accelerators is challenging as high-precision data converters are expensive. In this paper, we overcome this challenge by using the residue number system (RNS) to compose high-precision operations from multiple low-precision operations. This enables us to eliminate the information loss caused by the limited precision of the ADCs. Our study shows that RNS can achieve 99% FP32 accuracy for state-of-the-art DNN inference using data converters with only $6$-bit precision. We propose using redundant RNS to achieve a fault-tolerant analog accelerator. In addition, we show that RNS can reduce the energy consumption of the data converters within an analog accelerator by several orders of magnitude compared to a regular fixed-point approach.
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