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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
743
Total Papers
583
No Code
10
Twilight
150
Has Code
20.2%
Survival Rate
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Panacea: Novel DNN Accelerator using Accuracy-Preserving Asymmetric Quantization and Energy-Saving Bit-Slice Sparsity
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PrefixLLM: LLM-aided Prefix Circuit Design
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if-ZKP: Intel FPGA-Based Acceleration of Zero Knowledge Proofs
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Design Space Exploration of Approximate Computing Techniques with a Reinforcement Learning Approach
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U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators
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Efficient LLM inference solution on Intel GPU
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CMOS-based Single-Cycle In-Memory XOR/XNOR
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SafeBet: Secure, Simple, and Fast Speculative Execution
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XCRYPT: Accelerating Lattice Based Cryptography with Memristor Crossbar Arrays
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CRAFT: Criticality-Aware Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks
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Analog, In-memory Compute Architectures for Artificial Intelligence
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Thermal Heating in ReRAM Crossbar Arrays: Challenges and Solutions
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Customizing Number Representation and Precision
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A Charge Domain P-8T SRAM Compute-In-Memory with Low-Cost DAC/ADC Operation for 4-bit Input Processing
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TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs
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ProcessorFuzz: Guiding Processor Fuzzing using Control and Status Registers
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HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory
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Accelerating Irregular Applications via Efficient Synchronization and Data Access Techniques
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Overview of contemporary systems driven by open-design movement
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Demonstrating BrainScaleS-2 Inter-Chip Pulse-Communication using EXTOLL
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Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors
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A Quarter of a Century of Neuromorphic Architectures on FPGAs -- an Overview
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