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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
743
Total Papers
583
No Code
10
Twilight
150
Has Code
20.2%
Survival Rate
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Stuck-at Faults in ReRAM Neuromorphic Circuit Array and their Correction through Machine Learning
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A Deep Neural Network Deployment Based on Resistive Memory Accelerator Simulation
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GPT-OSS-20B: A Comprehensive Deployment-Centric Analysis of OpenAI's Open-Weight Mixture of Experts Model
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HPU: High-Bandwidth Processing Unit for Scalable, Cost-effective LLM Inference via GPU Co-processing
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PIMDAL: Mitigating the Memory Bottleneck in Data Analytics using a Real Processing-in-Memory System
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Random Adaptive Cache Placement Policy
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Good things come in small packages: Should we build AI clusters with Lite-GPUs?
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Optimizing ML Concurrent Computation and Communication with GPU DMA Engines
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Nanoscaling Floating-Point (NxFP): NanoMantissa, Adaptive Microexponents, and Code Recycling for Direct-Cast Compression of Large Language Models
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Global Optimizations & Lightweight Dynamic Logic for Concurrency
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Flex-TPU: A Flexible TPU with Runtime Reconfigurable Dataflow Architecture
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Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning
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hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation
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Bottom-Up Generation of Verilog Designs for Testing EDA Tools
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ESSR: An 8K@30FPS Super-Resolution Accelerator With Edge Selective Network
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DaeMon: Architectural Support for Efficient Data Movement in Disaggregated Systems
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Accelerating FPGA-Based Wi-Fi Transceiver Design and Prototyping by High-Level Synthesis
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FPGA deep learning acceleration based on convolutional neural network
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TrappeD: DRAM Trojan Designs for Information Leakage and Fault Injection Attacks
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Efficient Fault Injection based on Dynamic HDL Slicing Technique
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Particle Mesh Ewald for Molecular Dynamics in OpenCL on an FPGA Cluster
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The Cost of Software-Based Memory Management Without Virtual Memory
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