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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
732
Total Papers
583
No Code
10
Twilight
139
Has Code
19.0%
Survival Rate
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COMET: A Cross-Layer Optimized Optical Phase Change Main Memory Architecture
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Just-in-time Quantization with Processing-In-Memory for Efficient ML Training
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Computing and Compressing Electron Repulsion Integrals on FPGAs
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FantastIC4: A Hardware-Software Co-Design Approach for Efficiently Running 4bit-Compact Multilayer Perceptrons
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Polystore++: Accelerated Polystore System for Heterogeneous Workloads
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Performance Analysis of Linear Algebraic Functions using Reconfigurable Computing
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Toleo: Scaling Freshness to Tera-scale Memory using CXL and PIM
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Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural networks: from Algorithms to Technology
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CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure
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Towards Efficient Flash Caches with Emerging NVMe Flexible Data Placement SSDs
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DiP: A Scalable, Energy-Efficient Systolic Array for Matrix Multiplication Acceleration
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Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems
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DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications
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INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing
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MicroRec: Efficient Recommendation Inference by Hardware and Data Structure Solutions
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Fault-Tolerant Nanosatellite Computing on a Budget
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A Dwarf-based Scalable Big Data Benchmarking Methodology
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OpenGeMM: A High-Utilization GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling
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VEDLIoT -- Next generation accelerated AIoT systems and applications
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Multi-criteria Hardware Trojan Detection: A Reinforcement Learning Approach
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Hardware-Software Co-Design of BIKE with HLS-Generated Accelerators
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Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures
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