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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
732
Total Papers
583
No Code
10
Twilight
139
Has Code
19.0%
Survival Rate
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CAMEL: Co-Designing AI Models and Embedded DRAMs for Efficient On-Device Learning
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Optimizing High-Level Synthesis Designs with Retrieval-Augmented Large Language Models
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Automatic Microprocessor Performance Bug Detection
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Analysis of Energy Consumption in a Precision Beekeeping System
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Constructing a Weak Memory Model
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When to use 3D Die-Stacked Memory for Bandwidth-Constrained Big Data Workloads
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A 9.52 dB NCG FEC scheme and 164 bits/cycle low-complexity product decoder architecture
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DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent
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MetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs
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An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips
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Mirage: An RNS-Based Photonic Accelerator for DNN Training
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ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining
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OMU: A Probabilistic 3D Occupancy Mapping Accelerator for Real-time OctoMap at the Edge
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Circuit and System Technologies for Energy-Efficient Edge Robotics
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A Resource-efficient Spiking Neural Network Accelerator Supporting Emerging Neural Encoding
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Embedding Hardware Approximations in Discrete Genetic-based Training for Printed MLPs
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Memory-Centric Computing: Solving Computing's Memory Problem
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MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Processing
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Formalising CXL Cache Coherence
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An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation
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UB-Mesh: a Hierarchically Localized nD-FullMesh Datacenter Network Architecture
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ReducedLUT: Table Decomposition with "Don't Care" Conditions
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