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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
759
Total Papers
568
No Code
21
Twilight
170
Has Code
22.4%
Survival Rate
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RailX: A Flexible, Scalable, and Low-Cost Network Architecture for Hyper-Scale LLM Training Systems
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MOFCO: Mobility- and Migration-Aware Task Offloading in Three-Layer Fog Computing Environments
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SLIM: A Heterogeneous Accelerator for Edge Inference of Sparse Large Language Model via Adaptive Thresholding
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CCSS: Hardware-Accelerated RTL Simulation with Fast Combinational Logic Computing and Sequential Logic Synchronization
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Accelerating Transposed Convolutions on FPGA-based Edge Devices
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PUDTune: Multi-Level Charging for High-Precision Calibration in Processing-Using-DRAM
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Exploration of Cryptocurrency Mining-Specific GPUs in AI Applications: A Case Study of CMP 170HX
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Advancing AI-assisted Hardware Design with Hierarchical Decentralized Training and Personalized Inference-Time Optimization
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Splitwiser: Efficient LM inference with constrained resources
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Understanding and Optimizing Multi-Stage AI Inference Pipelines
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SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Sequence Analysis
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MLDSE: Scaling Design Space Exploration Infrastructure for Multi-Level Hardware
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FlexStep: Enabling Flexible Error Detection in Multi/Many-core Real-time Systems
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ARCAS: Adaptive Runtime System for Chiplet-Aware Scheduling
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Kitsune: Enabling Dataflow Execution on GPUs
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Analyzing a Two-Tier Disaggregated Memory Protection Scheme Based on Memory Replication
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JExplore: Design Space Exploration Tool for Nvidia Jetson Boards
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TCDM Burst Access: Breaking the Bandwidth Barrier in Shared-L1 RVV Clusters Beyond 1000 FPUs
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COMPASS: A Compiler Framework for Resource-Constrained Crossbar-Array Based In-Memory Deep Learning Accelerators
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JSPIM: A Skew-Aware PIM Accelerator for High-Performance Databases Join and Select Operations
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MAPS: Energy-Reliability Tradeoff Management in Autonomous Vehicles Through LLMs Penetrated Science
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Interactive and Automatic Generation of Primitive Custom Circuit Layout Using LLMs
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