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🏛️ The Hardware Architecture Crypt
cs.AR: Where Hardware Architecture papers rest without their code.
779
Total Papers
568
No Code
21
Twilight
190
Has Code
24.4%
Survival Rate
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Towards High-Performance Network Coding: FPGA Acceleration With Bounded-value Generators
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Vorion: A RISC-V GPU with Hardware-Accelerated 3D Gaussian Rendering and Training
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GFormer: Accelerating Large Language Models with Optimized Transformers on Gaudi Processors
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IMPACT:InMemory ComPuting Architecture Based on Y-FlAsh Technology for Coalesced Tsetlin Machine Inference
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Efficient transformer adaptation for analog in-memory computing via low-rank adapters
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RISC-V Word-Size Modular Instructions for Residue Number Systems
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GateSeeder: Near-memory CPU-FPGA Acceleration of Short and Long Read Mapping
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Enabling Accelerators for Graph Computing
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Machine Learning aided Computer Architecture Design for CNN Inferencing Systems
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ReDSEa: Automated Acceleration of Triangular Solver on Supercloud Heterogeneous Systems
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RETROSPECTIVE: Corona: System Implications of Emerging Nanophotonic Technology
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Enabling Kernel Bypass Networking on gem5
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A Custom 7nm CMOS Standard Cell Library for Implementing TNN-based Neuromorphic Processors
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On the Impact of Partial Sums on Interconnect Bandwidth and Memory Accesses in a DNN Accelerator
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PIUMA: Programmable Integrated Unified Memory Architecture
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Addressing Variability in Reuse Prediction for Last-Level Caches
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A Compiler Infrastructure for FPGA and ASIC Development
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Boosting the Bounds of Symbolic QED for Effective Pre-Silicon Verification of Processor Cores
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Higher-Level Hardware Synthesis of The KASUMI Algorithm
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Remote Control: A Simple Deadlock Avoidance Scheme for Modular System on Chip
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High Performance Reconfigurable Computing Systems
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Wrangling Rogues: Managing Experimental Post-Moore Architectures
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